Identify the step size for an 8-bit analog-to-digital converter with Vref= 2.5 VDC?
Identify the step size for an 8-bit analog-to-digital converter with Vref= 2.5 VDC?
10 millivolts
25 millivolts
4.9 millivolts
5 volts
2. Question :(TCO # 5) How many steps are available with a 10-bit ADC?
10
1024
512
256
3. Question :(TCO #5) What is the cutoff frequency for a low-pass filter with a resistor R = 3000 and a capacitor C = .01 µf?
f = 5.3 KHz
f = 3300 Hz
f = 120 KHz
f = 6 KHz
4. Question :(TCO #5)A band-stop filter is a filter that _____ frequencies below low-limit and above high-limit frequencies and _____ frequencies between the limits.
blocks; blocks
passes; blocks
blocks; passes
has; blocks
5. Question :(TCO #5) A bridge with R1= 5.1 K, R2= 2 K, and R3= 15 K can be at null if R4is _____.
10.5 K
5.88 K
588
1 K
6. Question : (TCO #5) An instrumentation amplifier with two buffers has a feedback resistor of 100 K. The two resistors from the buffer’s output to the input of the last stage OP-Amp are 1 K resistors. Voltage levels to the non-inverting buffer inputs. Voltage levels to the non-inverting buffer inputs are V1= .06 volt and V2= .02 volts. What is Voutof the instrumentation amplifier?
4 Volts
20.4 Volts
3.3 Volts
15.3 Volts
7. Question : (TCO #5) An embedded system with an 8-bit analog-to-digital converter is connected to a transducer with an output voltage of 10 millivolts. This signal is amplified by an amplifier with a gain of 25. Assume that this signal level is appropriate for the ADC input. If the reference voltage of the ADC converter is 5 volts, what will be the output of the ADC in binary form?
01100110
00110011
00001101
01111011
8. Question: (TCO #5) An 8-bit analog-to-digital converter has maximum output voltage of 2.5 VDC. What is the reference voltage to this ADC?
2.5 VDC
5 VDC
1.25 VDC
None of the above
9. Question : (TCO #5) A well-behaved analog signal with a frequency of 20 kHz is being sampled. What is the sampling frequency if frequency aliasing occurs?
90 kHz
40 kHz
85 kHz
60 khz
10. Question : (TCO #5) To model a nonlinear transducer, one can _____.
use empirically determined nonlinear equation
use a piecewise linear system
use a lookup table located in memory
All of the above
ECET365 Embedded Microprocessor Systems
Week 3 Quiz
1. Question : (TCO #3) Which interrupt is non-maskable?
Software interrupt (SWI)
Interrupt from a device connected to IRQ pin of HCS12 microcontroller
Both A and B
Interrupt by multiple devices connected to IRQ pin of HCS12 microcontroller
2. Question : (TCO #3) Which of the following interrupts has the highest priority?
TCNT timer overflow
SCI0
ATD0
ATD1
3. Question : (TCO #3) Which selection is connected to the reset module in the HCS12 microcontroller?
Reset pin
ADC0
ADC1
None of the above
4. Question : (TCO #3) Which bit can mask a maskable interrupt?
S bit
Z bit
N bit
None of the above
5. Question : (TCO #3) In the HCS12 microcontroller, the address range 0xFFFE – 0xFFFF in the interrupt vector table is assigned to which of the following?
Clock monitor fail reset
ATD0
Reset
COP failure reset
6. Question : (TCO #3) Freescale utilizes BDM to _____.
check each instruction of a program individually
reset CPU by setting IRQ pin to high-level logic
check changes in memory and CPU register for each instruction execution
Both A and C
7. Question : (TCO #3) Watch dog timer is a utility that _____.
can reset the microcontroller whenever a program locks up.
can catch errors due to memory corruption
makes sure that a program does go to an unintentional infinite loop sequence
Both A and B
8. Question : (TCO #3) When an interrupt occurs, _____.
in one stage, the contents of the CPU move to RAM memory
the CPU finishes executing its current instruction before it starts running an interrupt thread
all interrrupts will be ignored if the I bit is zero
Both A and B
9. Question : (TCO #3) Which combination is an appropriate way of setting up the PORTJ interrupt to enabled?
Pin I of CCR = 0
Pin I of CCR = 1
Pin I of CCR = 1 and PIEJ7 = 1
Pin I of CCR = 0 and PIEJ6 = 0
10. Question : (TCO #3) Which of the following interrupts has the highest priority immediately after a microcontroller reset?
Reset
XIRQ
COP
All have the same level of priority.
ECET365 Embedded Microprocessor Systems
Week 4 Quiz
1. Question : (TCO #1, 2, and 7) Select the header file in CodeWarrior for the Freescale MC9s12DG256.
mc9s12dg256.h
mc9s12dg256.header
mc9s12dg256.asm
mc9s12dg256
2. Question : (TCO #1, 2, and 7) _____ is part of the UNIX OS user layer.
API
Device driver
Shell
Core
3. Question : (TCO #1, 2, and 7) A multitask operating system is more feasible in _____.
an embedded system
a computer with multiple processors
a processor with two accumulators
a computer with multiple hard disks
4. Question : (TCO #1, 2, and 7) In layered software architecture, the main module is usually found within _____.
the last (lowest) layer
the API
the first (top) layer
a module inside a thread
5. Question : (TCO #1, 2, and 7) The user of a module may be interested in _____.
passing values to the module
the output format of the module
who wrote the module
Both A and B
6. Question : (TCO #1, 2, and 7) Identify the computer language commonly used for embedded programming.
C
Assembly
Both A and B
Pascal
7. Question : (TCO #1, 2, and 7) Which of the following commands loads hexadecimal number 44 to accumulator A?
LDAA #$44
LDAA #44
LDA #44
LDAA 44$
8. Question : (TCO #1, 2, and 7) C ++ encapsulation is _____.
grouping functions and variables into one class
grouping only functions in one class
grouping only variables in one class
grouping functions and variables in multiple classes
9. Question : (TCO #1, 2, and 7) Information shared by multiple program modules is known as _____.
a static int
a global variable
a local variable
a function
10. Question : (TCO #1, 2, and 7) A multichannel digital storage scope is known as _____.
an ICE
a logic analyzer
a spectrum analyzer
a network analyzer
ECET365 Embedded Microprocessor Systems
Week 5 Quiz
1. Question : (TCO #5) In an asynchronous data transfer _____.
the transmitter and receiver clock must be exactly the same all the time
the receiver clock must be exactly the same or multiple times the transmitter clock
it is not necessary to have a clock in the receiver
None of the above
2. Question : (TCO #5) Synchronization between data transmitter and receiver _____ data transfer.
is necessary in asynchronous
is necessary in synchronous
is necessary in both asynchronous and synchronous data transfer
is not necessary in both an asynchronous and synchronous
3. Question : (TCO #5) Which register is utilized in setting the baud rate in a SCI interface?
SCIBDH
SCI0CR2
SCI0BDL
Both A and C
4. Question : (TCO #5) To sample data at the falling edge of the clock when using SPI, _____.
CPA in SPICR1 must be 0
MSTR in SPICR1 must be 0
CPA in SPICR1 must be 1
MSTR in SPICR1 must be 1
5. Question : (TCO #5) A SPI master IC connects to slave IC with _____.
five wires
one wire
four wires
wireless
6. Question : (TCO #5) Communication between two modems through telephone lines is _____.
serial
parallel
digitalall the time
Both A and C
7. Question : (TCO #5) SPI implements a/an _____ protocol.
asynchronous
synchronous
parallel
TCP
8. Question : (TCO #5) In full-duplex data transfer, _____.
data transfer from the transmitter only
data bits transfer simultaneously in both directions
data bits transfer in both directions but not simultaneously
data bits transfer in a parallel bus
9. Question : (TCO #5) High voltage level in a TTL chip is _____.
12 volts
5 volts
-5 volts
-12 volts
10. Question : (TCO #5) USB utilizes _____.
a serial data transfer
a parallel data transfer
a mixed parallel/serial data transfer
a daisy chain to connect maximum of 10 devices
ECET365 Embedded Microprocessor Systems
Week 6 Quiz
1. Question : (TCO #6) How many 16-bit PWM channels are available in the Freescale 9S12DG256 microcontroller?
Two
Four
Seven
Eight
2. Question : (TCO #6) When concatenating the two 8-bit PWM Channels 3 and 2 to get a 16-bit PWM channel, _____ becomes the low-order byte.
Channel 7
Channel 2
Channel 5
Channel 3
3. Question : (TCO #6) To enable Channel 7 of the PWM to 9S12DG256, which of the following must be done?
Set PWME7 = 1
Set PWME7 = 0
Set CAE7 = 1
Set CAE7 = 0
4. Question : (TCO #6) What is Clock SA when PWMSCLA = 0×01 and Clock A = 4MHz?
5MHz
4MHz
8MHz
2MHz
5. Question : (TCO #6) What is Clock SA when PWMSCLA = 0×00 and Clock A = 8MHz?
8MHz
15625Hz
8MHz
31250Hz
6. Question : (TCO #6) A bus clock is set to 4000 kHz. What is the Clock A’s value if PWMPRCLK = 0×02?
1MHz
3MHz
2MHz
8MHz
7. Question : (TCO #6) In case of center-aligned PWM, which formula can be used for the duty cycle of the output waveform?
Duty Cycle = [(PWMPERx – PWMDTYx) / PWMPERx] * 100%
Duty Cycle = [PWMDTYx / PWMPERx] * 100%
Duty Cycle = PWMDTYx 100%
Both A or B (depends on PPOLx)
8. Question : (TCO #6) In case of center-aligned PWM, which formula can be used for the PWM frequency?
PWMx frequency = Clock (A, B, SA, or SB) / PWMPERx
PWMx frequency = Clock (A, B, SA, or SB) / (2 * PWMPERx)
PWMx frequency = Clock (A, B, SA, or SB) / (4 * PWMPERx)
PWMx frequency = Clock (A, B, SA, or SB) / (3 * PWMPERx)
9. Question : (TCO #6) Current passing through a wire creates an electromagnetic field that _____.
loops around the wire
is directly proportional to the amount of the current flowing inside the wire
is strongest closer to the wire
satisfies all of the above answers
10. Question : (TCO #6) PWM channels of a microcontroller are designed for control of a _____.
servo motor
AC motor
stepper motor
None of the above
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