When using a 4-bit cell to represent -5 (negative 5), what is the binary representation? 2The hexadecimal code for the – Load Byte from Input Device -is? 3To translate call-by-refe
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1When using a 4-bit cell to represent -5 (negative 5), what is the binary representation?
2The hexadecimal code for the – Load Byte from Input Device -is?
3To translate call-by-reference with global variables, the compiler generates code with all of the following steps, EXCEPT.4
4If a CPU use a Little-Endian architecture and the value loaded from memory is 72AD, how is the value represented in the CPU?
5Using twos complement binary arithmetic, the sum of 107 and 46 is:
6Using signed magnitude binary arithmetic, the sum of 75 and 46 is:
7The AND operator is also known as a Boolean sum. The OR operator is the Boolean product.
8A word is a contiguous group of bits.
9DeMorgans law provides an easy way of finding the complement of a Boolean function.
10The fundamental question of computer science is – What can be ______?
11The abstraction in computer systems has 7 levels match the level to the description.
12All of the following are considered level 6 languages, except?
13Like the CPU, main memory has a set of memory cells to store information. However, main memory differs in two respects from the CPU (select 2 answers).
14Processing occurs in the CPU, which contains the circuitry to control all the other parts of the computer. The CPU has a small set of memory, called _____.
15Main memory stores which of the following information (select all that apply)?
16Which of the following is NOT a function of an operating system?
17given the following MIPS code compiled from some C code:
bne $s3, $s4, Else
add $s0, $s1, $s2
j Exit
Else: sub $s0, $s1, $s2
Exit: …
Assuming that:
variable f is in $s0
variable g is in $s1
variable h is in $s2
variable i is in $s3
variable j is in $s4
What is the original C code?
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.
Clock Rate CPI Class A CPI Class B CPI Class C CPI Class D CPI Class E
a. P1 2.0 GH 1 2 3 4 3
P2 4.0 GH 2 2 2 4 4
b. P1 2.0 GH 1 1 2 3 2
P2 3.0 GH 1 2 3 4 3
Q1
Assume that peak performance is defined as the fastest rate that a computer can execute any instruction sequence. What are the peak performances of P1 and P2 expressed in instructions per second?
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.
Clock Rate CPI Class A CPI Class B CPI Class C CPI Class D CPI Class E
a. P1 2.0 GH 1 2 3 4 3
P2 4.0 GH 2 2 2 4 4
b. P1 2.0 GH 1 1 2 3 2
P2 3.0 GH 1 2 3 4 3
Q
If the number of instructions executed in a certain program is divided equally among the classes of instructions except for class A, which occurs twice as often as each of the others, which computer is faster? How much faster is it?
onsider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.
Clock Rate CPI Class A CPI Class B CPI Class C CPI Class D CPI Class E
a. P1 2.0 GH 1 2 3 4 3
P2 4.0 GH 2 2 2 4 4
b. P1 2.0 GH 1 1 2 3 2
P2 3.0 GH 1 2 3 4 3
Q.
If the number of instructions executed in a certain program is divided equally among the classes of instructions except for class E, which oc? curs twice as often as each of the others, which computer is faster? How much faster is it?
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