Which interrupt is non-maskable?

Which interrupt is non-maskable?

 

Software interrupt (SWI)

 

Interrupt from a device connected to IRQ pin of HCS12 microcontroller

 

Both A and B

 

Interrupt by multiple devices connected to IRQ pin of HCS12 microcontroller

 

2. Question : (TCO #3) Which of the following interrupts has the highest priority?

 

TCNT timer overflow

 

SCI0

 

ATD0

 

ATD1

 

3. Question : (TCO #3) Which selection is connected to the reset module in the HCS12 microcontroller?

 

Reset pin

 

ADC0

 

ADC1

 

None of the above

 

4. Question : (TCO #3) Which bit can mask a maskable interrupt?

 

S bit

 

Z bit

 

N bit

 

None of the above

 

5. Question : (TCO #3) In the HCS12 microcontroller, the address range 0xFFFE – 0xFFFF in the interrupt vector table is assigned to which of the following?

 

Clock monitor fail reset

 

ATD0

 

Reset

 

COP failure reset

 

6. Question : (TCO #3) Freescale utilizes BDM to _____.

 

check each instruction of a program individually

 

reset CPU by setting IRQ pin to high-level logic

 

check changes in memory and CPU register for each instruction execution

 

Both A and C

 

7. Question : (TCO #3) Watch dog timer is a utility that _____.

 

can reset the microcontroller whenever a program locks up.

 

can catch errors due to memory corruption

 

makes sure that a program does go to an unintentional infinite loop sequence

 

Both A and B

 

8. Question : (TCO #3) When an interrupt occurs, _____.

 

in one stage, the contents of the CPU move to RAM memory

 

the CPU finishes executing its current instruction before it starts running an interrupt thread

 

all interrrupts will be ignored if the I bit is zero

 

Both A and B

 

9. Question : (TCO #3) Which combination is an appropriate way of setting up the PORTJ interrupt to enabled?

 

Pin I of CCR = 0

 

Pin I of CCR = 1

 

Pin I of CCR = 1 and PIEJ7 = 1

 

Pin I of CCR = 0 and PIEJ6 = 0

 

10. Question : (TCO #3) Which of the following interrupts has the highest priority immediately after a microcontroller reset?

 

Reset

 

XIRQ

 

COP

 

All have the same level of priority.

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